Recent Press and Postings

SNUG Austin 2019: All Your Base Transactions Belong To Us    September 10, 2019

Source code referred to or used in the SNUG Austin '19 paper. ( Jeff Vance , Alex Melikian )

DVCon2018: Code examples for "My Testbench Used to Break, Now it Bends"    February 27, 2018

Source code referred to or included in the paper.  ( Jeff Montesano , Kevin Johnston , Jeff Vance , Vasconcellos, Kevin )

SNUG Austin 2016: Configuring a Date with a Model    September 19, 2016

Source code mentioned in the paper.  ( Jeff Montesano )

vlab_util package (for specman/e)    July 13, 2015

Verilab e-Language Utility Library

An e-language package that provides some utility macros+methods.
If you run ./ it will use and test all macros. So it works a bit like a unit test for the library.

To use the package in your own code include the following line:

import e/vlab_util_top;

    contains the CDNLive 2014 EMEA presentation as well as the paper.

    contains the actual e macro/utility code

   contains example code and some self checking of the macro implementation

Download available from ( Thorsten Dworzak )

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vlab_memoize    May 9, 2013

A Specman/e package that provides a memoization utility for methods.

Given a pure method definition, e.g. 
 foo(a: uint): int { ... }
you can memoize it at the place of its definition by 
MEMOIZE foo(a: uint): int { ... }

Download the source code from Github.
( Thorsten Dworzak )

SNUG Silicon Valley 2015: RESSL UVM Sequences to the Mat    March 23, 2015

Read-Evaluate-Start-Sequence-Loop (RESSL - pronounced "wrestle") is inspired by the Read-Evaluate-Print-Loop (REPL) found in Lisp and Python. The REPL in these languages encourage a rapid, iterative and interactive development process allowing the user to easily develop and test new sequences with a minimum of overhead. In the context of ASIC verification, RESSL enables the iterative development and debug of UVM sequences. Similar to the Lisp REPL, it includes four phases:

  • Read: A simple interpreter allowing the user to input commands via STDIN.
  • Evaluate: The evaluator takes those commands and executes them. These commands include among others, the ability to clone, alter parameters and start sequences.
  • Start-Sequence: The system starts the sequence (and any sub-sequences) defined.
  • Loop: Clean up and return back to the Read phase.
This paper provides details on the usage model, implementation and future work planned for the RESSL. A specially modified version of UVM-1.2 (with introspection) is required to use ressl and is supplied. You will need to also download svlib v0.4

( Bryan Morris , Jeff McNeal )

Work For Verilab