Verilab will be participating in SNUG Canada on Thursday 1st October.

Bryan Morris will re-present his paper entitled “RESSL UVM Sequences to the Mat” that he co-authored with Jeff McNeal (which won the 2014 SNUG SV Technical Committee’s Best Paper award) in the A1 - User Session - Testbench Techniques with UVM session.

Alex Melikian will present his paper, co-authored with Hilmar Van Der Kooij and entitled “Replacing Hardcoded Register Values with Hardcore Abstraction” in the same session.

Bryan and Alex will be available to discuss their papers at the SNUG Pub following the end of the afternoon’s technical sessions.

[updated: Alex and Hilmar's paper and slides can be found on our resources page. ]

Verilab will be at the Designer Community Expo where we will be raffling an Amazon Echo.

On Friday September 18th, Kevin Johnson will be presenting in the FA3 Verification - Improving Test Generation session a paper co-authored with Jonathan Bromley entitled Is Your Testing N-Wise or Unwise? Pairwise and N-wise Patterns in SystemVerilog for Efficient Test Configuration and Stimulus.

Jeff Montesano will be presenting the Technical Committee Award Winner during the FB4 User & Tutorial Session - UVM Agents, Verdi Debug session a paper co-authored with Mark Litterick entitled Mastering Reactive Slaves in UVM.

Papers and presentations for both can be downloaded from the Papers and Presentations section of our website.