Verilab’s award-winning paper entitled “Using the New Features in VMM 1.1 for Multi-Stream Scenarios” is now available for download from the Verilab website. Please let us know if you have any questions!

Verilab have added their OCP uVC verification component to the OCP-IP Library.

The Verilab OCP uVC is a mixed language verification component for the Open Core Protocol (OCP) implemented using SystemVerilog and e verification languages. It can be used as an Open Verification Methodology (OVM) Verification Component (OVC) in SystemVerilog-only applications without the Specman layer (or license), or it can be used in Specman-based verification environments as a regular e Verification Component (eVC).

The datasheet for the OCP uVC can be downloaded here