DVCON EU 2019: Be a Sequence Pro to Avoid Bad Con Sequences

Abstract

Slides

This tutorial provides a comprehensive overview of sequences and how we use them to orchestrate effective constrained-random stimulus in UVM testbench environments. The operation of these sequences on virtual and physical sequencers is presented in the context of proactive masters, reactive slaves and autonomous data stream generators. Guidelines for encapsulating sequences, architecting sequence libraries, managing complexity and enabling reuse are also provided. Techniques to maximize project productivity and improve progress tracking by leveraging the sequence API are discussed as well as the relationship between the sequence architecture and portable stimulus extensions using PSS.

  • Introduction to sequences – what are they & why do we care
  • Sequence execution – masters, reactive slaves, streaming data
  • Sequence guidelines – improve control, complexity, & reuse
  • Verification productivity – strategies to manage features
  • Portable Stimulus Considerations – how PSS impacts sequences

( Mark Litterick , Jeff Vance, Jeff Montesano )

Created  
October 29, 2019
#UVM #TUTORIAL #DVCON_EU