Kevin Johnston

Kevin has over 25 years experience in the design and verification of digital ASIC's, processor cores and SoC's. Since joining Verilab in January of 2006, Kevin has assisted with the verification of a multi-threaded DSP core and taught a graduate course in processor architecture at the Universidade Federal do Rio Grande do Sul, Porto Alegre in Brazil. Prior to Verilab, Kevin worked at Motorola/Freescale designing and verifying 68K- and PowerPC-based SoC's, and at Texas Instruments as a design and test engineer.